Experience

 
 
 
 
 

PhD Research Intern

Advanced Micro Devices (AMD)

May 2022 – July 2022 Singapore

  • Research Intern at AMD Xilinx Labs Asia Pacific CTO group.
  • Working on hardware-software accelerator for emerging blochains.
 
 
 
 
 

PhD Research Intern

Renesas

Jan 2022 – April 2022 Singapore

  • Worked on DRP-AI accelerator.
 
 
 
 
 

CPU Design Engineer

Qualcomm

Jul 2018 – Jan 2021 Bengaluru, India
Responsibilities include:

  • Delivering multi-clock domain and Low Power(UPF) RTL delivery of ARM Kryo cores for Snapdragon chipsets
  • Exposure to Power ManagerIP, DCVS and Low Power Modes using ARM’s P-channel, and boot RTL in Snapdragon CPU’s
  • Experienced in writing SystemVerilog assertions, code coverage and functional coverage closure
  • Experienced in Synthesis flows,reviewing Design Constraints, timing arcs, and optimised registers
 
 
 

Research Assistant

Nanyang Technological University

Aug 2017 – Dec 2017 Singapore

  • Designed a dynamic memory authentication scheme for cyberphysical systems and improved upon it using cache-oblivious algorithms.
  • The design was initially studied on FPGA's and further integrated in Multi2sim system simulator to study the performance impact with various SPEC and PARSEC benchmarks.
  • Resulted in an average reduction of performance overhead by 20-30%.

Publications

Coarse-Grained Reconfigurable Arrays (CGRAs) are well-suited to resource-constrained edge devices due to their optimal combination of performance, energy efficiency, and adaptability. However, CGRAs typically follow a rigid execution model — either spatio-temporal or spatial — irrespective of the workload, limiting their efficiency. …

On-chip training improves model accuracy on personalised user data and preserves privacy. his work proposes REACT, an AI accelerator for wearables …

Memory integrity trees are widely-used to protect external memories in embedded systems against bus attacks. However, existing methods …

Memory integrity trees are widely-used to protect external memories in embedded systems against replay, splicing and spoofing attacks …

Integrity trees are widely used in computer systems to prevent replay, splicing, and spoofing attacks on memories. Such mechanisms …

Many-core processing platforms are gaining significant interest for a wide range of applications, viz., Internet of Things (IoT), …

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